Paper Title
Analog CMOS Implementation of Memory Units and Memory Devices

The most widely used semiconductor memory types are the dynamic random access memory and static random access memory competition among memory manufactures drives the need to decrease power consumption and reduce the probability of read failure. The concept of CMOS implementation (schematic design) of different memory units and devices. Memory design is one of the interesting subject in semiconductor technology for storing binary data in large quantities. The purposed memory design takes into account the type of memory unit that is preferable for a given technology and application and is a function of required memory size. The time it takes to access the memory data, pattern and configuration to optimize the memory architecture for low power dissipation and more importantly over all system requirements. The project is dealt with basic memory architecture and their essential peripheral blocks. It emphasis on the working of memory units (eg. flipflop) and memory devices (SRAM & DRAM) with their schematic diagram to obtain their characteristic- Memory design is one of the interesting subjects in semiconductor technology. They have fascinated world through storage of data values and program instructions. Memory is a portion of a system for storing binary data in large quantities. Type of memory unit that is preferable or a given technology is governed by its architecture and other essential building blocks. Cell structure and topology is governed by the technology (Here 300 nm, 2 metal layer C5 process). The peripheral blocks include the address decoders, sense amplifiers, voltage references, drivers, buffers, timing and control. In this design we will be defining our memory size in bits (that are equivalent to the number of cells.) The proposed size of the array is 64 bits i.e. 8 x 8 array. Moreover this CMOS memory design will also be including sensing amplifiers and circuits, row and column decoders, control circuitry and finally the operation of memory cells themselves. Initially memory design procedure will be primarily consisting of defining the architecture and then laying out respective memory cell. Then according to architecture the peripheral circuitry is laid out. Finally memory check and optimization procedures are carried out with various simulation tools. Keywords - Semiconductor Memory, DRAM, Cell, Array, Spice, layout, Sense amplifiers, Decoder, Bitlines, Wordlines.