Paper Title
FPGA Implementation and Design of Less Complex Low Power Multiplier in Symica Using Reversible Logic

Abstract
Heat generation is the major drawback in conventional electronic circuits or systems. Reversible logic is a solution for this drawback. Reversible logic can avoid the problem of heat generation, improves the system performance and consumes low power. This paper proposed a less complex low power reversible multiplier. It was simulated in Modelsim, synthesized in Xilinx, implemented in Spartan FPGA,designed in SYMICA tool with final results. Index Terms Baugh-Wooley Approach, Complementary Pass Transistor Logic, Standard Reversible Logic Gates, Wallace Signed Multiplication.