Paper Title
Development, Implementation and Testing of Gigabit Ethernet Communication Interface for FPGA

Abstract
Indus Accelerator Complex is a synchrotron radiation facility in India, located at Raja Ramanna Centre for Advanced Technology, Indore. Indus Accelerator Complex consists of two synchrotron radiation sources: Indus-1 and Indus-2 [1]. The measurement of beam position in accelerators is required for smooth and controlled operation of accelerator. Field Programmable Gate Array (FPGA) based Beam position measurement electronics is used to measure the beam position and provide orbit feedback in accelerators. In order to transmit beam position data, Gigabit Ethernet communication link is required. For this purpose, Media Access Control (MAC) has been developed. Apart from MAC, communication protocols like Transmission Control Protocol (TCP), Address Resolution Protocol (ARP) and Internet Control Message Protocol (ICMP) have also been developed for 1 Gbps communication interface. This paper presents the development of Gigabit Ethernet communication link, its implementation on Kintex-7 FPGA and the results of lab testing. Keywords - Gigabit Ethernet, MAC, FPGA, Communication Protocols.