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CONFERENCE DATE:
Mumbai, India 25-01-2026
 
Proceeding Detail

ISETE INTERNATIONAL CONFERENCE

DESIGN AND ANALYSIS OF A POWER–PERFORMANCE OPTIMIZED MOS CURRENT-MODE LOGIC DIVIDE-BY-3 PRE-SCALER FOR HIGH-FREQUENCY APPLICATIONS
Page(s): 1-7  
Author SAKSHI SINGH, SANDEEP SINGH GILL, KANIKA SHARMA  
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